Difference between RISC and CISC

What Is RISC?

Reduction Instruction Set Computer (RISC) is a multiprocessor particularly designed to process limited computer instructions in order to operate at a much higher speed. On any given system, there are many programs and many instructions being executed. It was discovered that only 10% of all instructions were frequently executed, and that the other 90% clogged the pipeline, thus contributing to the system slowness.

What Is CISC?

Unlike the RISC model, Complex Instruction Set Computer (CISC) is a processor which is developed with a full (i.e. complex) set of instructions. The aim with this full instruction set is to provide the full processor capacity in the most efficient manner. RISC models proved, however, that better efficiency was achieved by reducing the set of instructions. 

Difference between RISC and CISC

RISC

• Richer instruction set, some simple, some very complex.
• Instructions generally take more than 1 clock to execute.
• Instructions of a variable size.
• Instruction interface with memory in multiple mechanism with complex addressing modes.
• No pipelining
• Upward compatibility with a family
• Microcode control
• Work well with simpler compiler.

CISC

• Simple primitive instructions and addressing modes.
• Instructions execute in one clock cycle.
• Uniformed length instructions and fixed instructions format.
• Pipelining.
• Instructions set is orthogonal (little overlapping of instructions functionality).
• Hardwired control.
• Complexity pushed to the compiler.

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